M66221SP - Mitsubishi

M66221SP 256 x 9-BIT MAIL-BOX

The M66221 is a mail box that incorporates a complete CMOS shared memory cell of 256 × 9-bit configuration using high-performance silicon gate CMOS process technology, and is equipped with two access ports of A and B. Access ports A and B are equipped with independent addresses CS, WE and OE control pins and I/O pins to allow independent and asynchronous rea.

Features

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• Memory configuration of 256 × 9 bits High-speed access, address access time 40ns (typ.) Complete asynchronous accessibility from ports A and B Completely static operation Built-in port arbitration function Low power dissipation CMOS design 5V single power supply Not Ready output pin is provided (open drain output) TTL direct-coupled I/O 3-state output for I/O pins. M66221SP APPLICATION Inter-MPU data transfer memory, buffer memory for image processing system.  I/O0A ↔ 15   I/O1A ↔ 16  I/O2A ↔ 17   I/O3A ↔ 18 A PORT  ↔ DATA I/O  I/O4A 19  ↔ 20 5 A I/O   I/O6A ↔.