M54HCT10 - ST Microelectronics

M54HCT10 TRIPLE 3-INPUT NAND GATE

The M54/74HCT10 is a high speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs are equipped with prot.

Features

compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption. INPUT AND OUTPUT EQUIVALENT CIRCUIT ORDER CODES : M54HCT10F1R M74HCT10M1R M74HCT10B1R M74HCT10C1R PIN CONNECTIONS (top view) NC = No Internal Connection February 1993 1/9 M54/M74HCT10 TRUTH TABLE A L X X H B X L X H C X X L H Y H H H L IEC LOGIC SYMBOL PIN DESCRIPTION PIN No 1, 3, 9 2, 4, 10 13, 5, 11 12, 6, 8 7 14 SYMBOL 1A to 3A 1B to 3B 1C to 3C 1Y .