M464S6554BTS - Samsung semiconductor

M464S6554BTS SDRAM Unbuffered SODIMM

Pin Name A0 ~ A12 BA0 ~ BA1 DQ0 ~ DQ63 CLK0 ~ CLK1 CKE0 ~ CKE1 CS0 ~ CS1 RAS CAS Select bank Data input/output Clock input Clock enable input Chip select input Row address strobe Column address strobe Function Address input (Multiplexed) WE DQM0 ~ 7 VDD VSS SDA SCL DU NC Pin Name Write enable DQM Power supply (3.3V) Ground Serial data I/O Serial clock Don′t .

Features

f refresh capability (8192 Cycles/64ms)
• LVTTL compatible inputs and outputs
• Single 3.3V ± 0.3V power supply
• MRS cycle with address key programs Latency (Access from column address) Burst length (1, 2, 4, 8) Data scramble (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock
• Serial presence detect with EEPROM Rev. 1.2 March 2004 256MB, 512MB Unbuffered SODIMM PIN CONFIGURATIONS (Front side/back side) Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 Front VSS DQ0 DQ1 DQ2 DQ3 VDD DQ4 DQ5 DQ6 DQ7 VSS DQM0 DQM1 VDD A0 A1.