LatticeXP2 - Lattice Semiconductor

LatticeXP2 FPGA fabric

LatticeXP2™ Family Data Sheet DS1009 Version 01.8, January 2012 LatticeXP2 Family Data Sheet Introduction January 2012 Data Sheet DS1009 Features  flexiFLASH™ Architecture • • • • • • Instant-on Infinitely reconfigurable Single chip FlashBAK™ technology Serial TAG memory Design security  Flexible I/O Buffer • sysIO™ buffer supports: – LVCMOS 33/25/18/15.

Features

 flexiFLASH™ Architecture
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• Instant-on Infinitely reconfigurable Single chip FlashBAK™ technology Serial TAG memory Design security
 Flexible I/O Buffer
• sysIO™ buffer supports:
  – LVCMOS 33/25/18/15/12; LVTTL
  – SSTL 33/25/18 class I, II
  – HSTL15 class I; HSTL18 class I, II
  – PCI
  – LVDS, Bus-LVDS, MLVDS, LVPECL, RSDS
 Live Update Technology
• TransFR™ technology
• Secure updates with 128 bit AES encryption
• Dual-boot with external SPI
 Pre-engineered Source Synchronous Interfaces
• DDR / DDR2 interfaces up to 200 MHz
• 7:1 LVDS interfaces support display applications
• XGMII .