The LP62S16128C-I is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.6V. It is built using AMIC's high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. The chip.
n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: Very low power version: Operating: 55ns 40mA (max.) 70ns 35mA (max.) Standby: 10µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2V (min.) n Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages 128K X 16 BIT LOW VOLTAGE CMOS SRAM General Description The LP62S16128C-I is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | LP62S16128CV-55LLT |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
2 | LP62S16128CV-70LLI |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
3 | LP62S16128CV-70LLT |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
4 | LP62S16128C-I |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
5 | LP62S16128C-T |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
6 | LP62S16128CU-55LLI |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
7 | LP62S16128CU-55LLT |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
8 | LP62S16128CU-70LLI |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
9 | LP62S16128CU-70LLT |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
10 | LP62S16128-T |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
11 | LP62S16128B-I |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM | |
12 | LP62S16128B-T |
AMIC Technology |
128K X 16 BIT LOW VOLTAGE CMOS SRAM |