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The LP62S1024A-T is a low operating current 1,048,576bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMIC's high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enab.
n Power supply range: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: Very low power version: Operating:(70NS)30mA(max.) (55NS)40mA(max.) Standby:5uA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Output enable and two chip enable inputs for easy application n Data retention voltage: 2V (min.) n Available in 32-pin SOP, TSOP, TSSOP (8 X 13.4mm) forward type and 36-pin CSP packages General Description The LP62S1024A-T is a low operating current 1,048,576bit static random access.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | LP62S1024AU-55LLT |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 2 | LP62S1024A-I |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 3 | LP62S1024A-T |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 4 | LP62S1024AM-55LLT |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 5 | LP62S1024AM-70LLT |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 6 | LP62S1024AV-55LLI |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 7 | LP62S1024AV-55LLT |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 8 | LP62S1024AV-70LLI |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 9 | LP62S1024AV-70LLT |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 10 | LP62S1024AX-55LLI |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 11 | LP62S1024AX-55LLT |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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| 12 | LP62S1024AX-70LLI |
AMIC Technology |
128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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