LMK5C33216 - Texas Instruments

LMK5C33216 Ultra-Low Jitter Clock Synchronizer

The LMK5C33216 is a high-performance network clock generator, synchronizer, and jitter attenuator with advanced reference clock selection and hitless switching capabilities designed to meet the stringent requirements of communications infrastructure applications. The LMK5C33216 integrates 3 DPLLs with programmable loop bandwidth and no external loop filter.

Features

• BAW APLL with 40 fs RMS jitter at 491.52 MHz
• Three high-performance digital phase locked loops (DPLLs) with paired analog phase locked loops (APLLs)
  – Programmable DPLL loop bandwidth from 0.01 Hz to 4 kHz
  – -116 dBc/Hz at 100 Hz offset at 122.88 MHz DPLL TDC noise with ≥ 20 MHz TDC rate
• Two differential or single-ended DPLL inputs
  – 1 Hz to 800 MHz differential
  – Hitless switching with phase cancellation and/or phase slew control
  – Priority based reference selection
• 16 outputs with programmable format
  – 1000 MHz LVPECL/LVDS/HSDS
  – 3000 MHz CML on OUT4 and OUT6
  – 200 MHz LVCMOS on OUT0.