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The LMK1D1212 clock buffer distributes with minimum skew one of two selectable clock inputs (IN0, IN1) to 12 pairs of differential LVDS clock outputs (OUT0 through OUT11). Similarly, the LMK1D1216 distributes 16 pairs of differential LVDS clock outputs (OUT0 through OUT15). The LMK1D121x family can accept two clock sources into an input multiplexer. The inp.
• High-performance LVDS clock buffer family: up to 2 GHz
– 2:12 differential buffer (LMK1D1212)
– 2:16 differential buffer (LMK1D1216)
• Supply voltage: 1.71 V to 3.465 V
• Low additive jitter: < 60 fs RMS maximum in 12-
kHz to 20-MHz at 156.25 MHz
– Very low phase noise floor: -164 dBc/Hz
(typical)
• Very low propagation delay: < 575 ps maximum
• Output skew: 20 ps maximum
• High-swing LVDS (boosted mode): 500-mV VOD
typical when AMP_SEL = 1
• Universal inputs accept LVDS, LVPECL, LVCMOS,
HCSL and CML signal levels
• LVDS reference voltage, VAC_REF, available for
capacitive-coupled inputs
• I.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | LMK1D1216 |
Texas Instruments |
Low Additive Jitter LVDS Buffer |
|
| 2 | LMK104DNEFWU-AKA |
TOPWAY |
LCD |
|
| 3 | LMK105 |
Taiyo Yuden |
MULTILAYER CERAMIC CAPACITORS |
|
| 4 | LMK1C1102 |
Texas Instruments |
LVCMOS Clock Buffer |
|
| 5 | LMK1C1103 |
Texas Instruments |
LVCMOS Clock Buffer |
|
| 6 | LMK1C1104 |
Texas Instruments |
LVCMOS Clock Buffer |
|
| 7 | LMK00101 |
Texas Instruments |
Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator |
|
| 8 | LMK00105 |
Texas Instruments |
Ultra-Low Jitter LVCMOS Fanout Buffer and Level Translator |
|
| 9 | LMK00301 |
Texas Instruments |
3-GHz 10-Output Ultra-Low Additive Jitter Differential Clock Buffer and Level Translator |
|
| 10 | LMK00304 |
Texas Instruments |
3-GHz 4-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator |
|
| 11 | LMK00306 |
Texas Instruments |
3-GHz 6-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator |
|
| 12 | LMK00308 |
Texas Instruments |
3-GHz 8-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator |
|