Preliminary Revise Block Diagram Release Date 2017-10-18 2017-11-03 NURL: www.topwaydisplay.com www.topwaysz.com Document Name: LMK070DICFWD-APA-2-Manual-Rev0.2.doc Page: 1 of 11 TOPWAY LCD Module User Manual LMK070DICFWD-APA-2 Table of Content 1. General Specification ........
5 5. Electrical Characteristics .... 5 5.1 DC Characteristics ..... 5 5.2 DC Characteristics(LVDS) 5 5.3 Touch panel Characteristics.....
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | LMK070DICFWD-AKC |
TOPWAY |
LCD | |
2 | LMK070DICFWD-AMA |
TOPWAY |
LCD | |
3 | LMK070DICFWD-NNA |
TOPWAY |
LCD | |
4 | LMK00101 |
Texas Instruments |
Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator | |
5 | LMK00105 |
Texas Instruments |
Ultra-Low Jitter LVCMOS Fanout Buffer and Level Translator | |
6 | LMK00301 |
Texas Instruments |
3-GHz 10-Output Ultra-Low Additive Jitter Differential Clock Buffer and Level Translator | |
7 | LMK00304 |
Texas Instruments |
3-GHz 4-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator | |
8 | LMK00306 |
Texas Instruments |
3-GHz 6-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator | |
9 | LMK00308 |
Texas Instruments |
3-GHz 8-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator | |
10 | LMK00334 |
Texas Instruments |
Four-Output Clock Buffer and Level Translator | |
11 | LMK00338 |
Texas Instruments |
8-Output PCIe Gen1/Gen2/Gen3/Gen4/Gen5 Clock Buffer and Level Translator | |
12 | LMK00725 |
Texas Instruments |
Differential-to-3.3V LVPECL Fanout Buffer |