L29C525 - LOGIC Devices Incorporated

L29C525 Dual Pipeline Register

The L29C525 is a high-speed, low power CMOS pipeline register. It is pin-for-pin compatible with the AMD Am29525. The L29C525 can be configured as two independent 8-level pipelines or as a single 16-level pipeline. The configuration implemented is determined by the instruction code (I1-0) as shown in Table 2. The I1-0 instruction code controls the internal r.

Features

u u u u u u u u Dual 8-Deep Pipeline Register Configurable to Single 16-Deep Low Power CMOS Technology Replaces AMD Am29525 Load, Shift, and Hold Instructions Separate Data In and Data Out Pins Three-State Outputs Package Styles Available:
• 28-pin Plastic DIP
• 28-pin Plastic LCC, J-Lead L29C525 BLOCK DIAGRAM A0 A1 A2 A3 A4 A5 A6 A7 B0 B1 B2 B3 B4 B5 B6 B7 REGISTER A0 REGISTER A1 REGISTER A2 REGISTER A3 REGISTER A4 REGISTER A5 REGISTER A6 D 7-0 8 I 1-0 2 CLK REGISTER A7 MUX Y 7-0 8 OE REGISTER B0 REGISTER B1 REGISTER B2 REGISTER B3 REGISTER B4 REGISTER B5 REGISTER B6 REGIS.