KS8620 - Samsung semiconductor

KS8620 1 Chip CODEC for Digital Answering phone

Pin No 1 2 3 4 5 6 7 Symbol VBB GNDA VFRO VCC FSR DR BCLKR / CLKSEL 1 Chip CODEC for Digital Answering phone Description VBB = -5V + 5% Analog ground Analog output of the receiver filter Vcc = +5V + 5% Receive frame sync pulse. 8KHz pulse train. PCM data input Logic input which selects either 1.536MHz / 1.544MHz or 2.048MHz for master clock in normal opera.

Features

• Complete CODEC and filtering system
• Encoding / Decoding : 8 bits µ-law PCM
• On-chip auto zero, sample and hold, and precision voltage references
• Low power dissipation : 60mW ( operating ) 3mW ( standby )
• + 5V operation
• TTL or CMOS compatible
• Automatic power down KS8620D PIN CONFIGURATION V BB GNDA VF RO V CC 1 2 3 4 16 VFI XI+ 15 VFXI14 GSX KS8620 13 TSX 12 FSX 11 DX 10 BCLK X 9 MCLK X FS R 5 DR BCLK R/CLKSEL 6 7 8 www.DataSheet4U.com MCLK R/PDN w w w D a S . a t h 4 e U c o t m . KS8620 BLOCK DIAGRAM R2 1 Chip CODEC for Digital Answering phone 14 GSx VFxIR1 Auto-zero .