KK16C554PL - KODENSHI KOREA

KK16C554PL QUAD-UART ASYNCHRONOUS COMMUNICATIONS ELEMENT

KK16C554 is an enhanced quadruple version of the 16C550 UART (Universal Asynchronous Receiver Transmitter). Each channel can be put into FIFO mode to relieve the CPU of excessive software overhead. In this mode, internal FIFOs are activated and 16 bytes plus 3 bit of error data per byte can be stored in both receive and transmit modes. Each channel performs .

Features

z z z z z z z z In the FIFO mode, Each channel’s transmitter and receiver is buffered with 16-byte FIFO to reduce the number of interrupts to CPU. Adds or deletes standard asynchronous communication bits (start, stop, parity) to or from the serial data. Holding Register and Shift Register eliminate need for precise synchronization between the CPU and serial data. Independently controlled transmit, receive, line status and data interrupts. Programmable Baud Rate Generators which allow division of any input reference clock by 1 to 216-1 and generate an internal 16X clock. Independent receiver cl.