The K4M513233E is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable bur.
• 3.0V & 3.3V power supply.
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system clock.
• Burst read single-bit write operation.
• Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh)
• DQM for masking.
• Auto refresh.
• 64ms refresh period (8K cycle).
• Commer.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | K4M513233E-F1H |
Samsung |
4M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA | |
2 | K4M513233E-F75 |
Samsung |
4M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA | |
3 | K4M513233E-L |
Samsung |
4M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA | |
4 | K4M513233E-MC |
Samsung |
4M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA | |
5 | K4M513233E-MEC |
Samsung |
4M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA | |
6 | K4M513233E |
Samsung |
4M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA | |
7 | K4M513233C |
Samsung semiconductor |
4M x 32Bit x 4 Banks Mobile SDRAM | |
8 | K4M51323LC-F |
Samsung semiconductor |
Mobile-SDRAM | |
9 | K4M51323LC-G |
Samsung semiconductor |
Mobile-SDRAM | |
10 | K4M51323LC-L |
Samsung semiconductor |
Mobile-SDRAM | |
11 | K4M51323LC-SDN |
Samsung semiconductor |
Mobile-SDRAM | |
12 | K4M51323LC-SN |
Samsung semiconductor |
Mobile-SDRAM |