TSSOP PIN 1 2 3 4 5 6 SYMBOL WP SCL SDA GND RW RL 7 RH 8 VCC DESCRIPTION Hardware write protection. Active low. Prevents any “Write” operation of the I2C interface. I2C interface clock Serial data I/O for the I2C interface Ground “Wiper” terminal of the DCP “Low” terminal of the DCP “High” terminal of the DCP Power supply FN8090 Rev.3.01 Jun 5, 2020.
• 256 resistor taps - 0.4% resolution
• I2C serial interface
• Wiper resistance: 70Ω typical at 3.3V
• Non-volatile storage of wiper position
• Standby current 5µA max
• Power supply: 2.7V to 5.5V
• 50kΩ, 10kΩ total resistance
• High reliability
- Endurance: 200,000 data changes per bit per register - Register data retention: 50 years at T +75°C
• 8 Ld MSOP and 8 Ld TDFN packaging
• Pb-free plus anneal available (RoHS compliant)
VCC
RH
SDA
WIPER
REGISTER
SCL
I2C AND
RW
CONTROL
WP
NON-VOLATILE
REGISTER
RL
GND
FIGURE 1. BLOCK DIAGRAM
FN8090 Rev.3.01 Jun 5, 2020
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IS.
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2 | ISL95813 |
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Intersil |
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6 | ISL95831C |
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7 | ISL95833 |
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8 | ISL95836 |
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3+2 Voltage Regulator | |
9 | ISL95839 |
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Dual 3+1 PWM Controller | |
10 | ISL95855 |
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3+2+1 Voltage Regulator | |
11 | ISL95855C |
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3+2+1 Voltage Regulator | |
12 | ISL95870 |
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PWM DC/DC Controller |