ISL80113 - Renesas

ISL80113 Low Input Voltage NMOS LDOs

VOUT Output voltage pin. Range 0.5V to 3.3V ADJ VBIAS ADJ pin for externally setting VOUT. Bias voltage pin for internal control circuits. Range 2.9V to 5.5V GND Ground pin PG VOUT in regulation signal. Logic low defines when VOUT is not in regulation. Range 0V to BIAS ENABLE VIN independent chip enable. TTL and CMOS compatible. Range 0V to VBIAS. .

Features

• Ultra low dropout: 75mV at 3A, (typical)
• Excellent VIN PSRR: 70dB at 1kHz (typical)
• ±1.6% assured VOUT accuracy for -40ºC < TJ < +125ºC
• Very fast load transient response
• Extensive protection and reporting features
• VIN range: 0.7V to 3.6V, VOUT range: 0.5V to 3.3V
• Small 10 Ld 3x3 DFN package Applications
• Noise-sensitive instrumentation and medical systems
• Data acquisition and data communication systems
• Storage, telecommunications and server equipment
• Low voltage DSP, FPGA and ASIC core power supplies
• Post-regulation of switched mode power supplies Related Literature For .