ISL6534 - Intersil

ISL6534 Dual PWM

, page 9) 2 FN9134.1 Block Diagram SS1/EN1 SS2/EN2 SS3/EN3 VCC5 30 µA VCC5 30 µA VCC5 30 µA 3.3V ISL6534 VCC POWER ON RESET AND CONTROL VREF VCC5 5.8V REFERENCE 3.3V BIAS CURRENT 0.6V 3.3V PGOOD = all 3 SS ramps done with no COMP short CLOCK AND SAWTOOTH GENERATOR PGOOD COMP1 FB1 REFIN FB2 COMP2 0.6V 3.3V 1-2 CLOCK CYCLE FILTER MONITOR IF .

Features

• Two Synchronous-Rectified Buck Controllers - Voltage Mode control - VIN range up to 12V - VOUT range from 0.6V to 6V - 12V LGATE drivers; up to 12V Boot Strap for UGATE
• Switcher References - 0.6V Reference for OUT1 (0.8% Accurate) - 3.3V Reference Output for OUT2 (0.8% Accurate) - External Reference Input for OUT2 - Buffered VTT Reference Output
• Switcher clocking - Phase options for Optimal Clock Relationship - Resistor-Selectable Switching Frequency (300kHz default; Resistor to Ground for 300kHz to 1MHz range) - Synchronization-Capable Switching Frequency (Connect FS_SYNC to Separate Re.