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Preliminary Information OCTOBER 2022 The IS43/46LR16640C/32320C is 1,073,741,824 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 64Meg words of 16bits or 32Meg words of 32bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted on a 16-bit or 32-bit bu.
• JEDEC standard 1.8V power supply.
• VDD = 1.8V, VDDQ = 1.8V
• Four internal banks for concurrent operation
• MRS cycle with address key programs
- CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave)
• Fully differential clock inputs (CK, /CK)
• All inputs except data & DM are sampled at the rising edge of the system clock
• Data I/O transaction on both edges of data strobe
• Bidirectional data strobe per byte of data (DQS)
• DM for write masking only
• Edge aligned data & data strobe output
• Center aligned data & data strobe input
OPTIONS
• Configura.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | IS46LR32320B |
ISSI |
8M x 32Bits x 4Banks Mobile DDR SDRAM |
|
| 2 | IS46LR32100C |
ISSI |
512K x 32Bits x 2Banks Mobile DDR SDRAM |
|
| 3 | IS46LR32100D |
ISSI |
512K x 32Bits x 2Banks Mobile DDR SDRAM |
|
| 4 | IS46LR32160B |
ISSI |
4M x 32Bits x 4Banks Mobile DDR SDRAM |
|
| 5 | IS46LR32160C |
ISSI |
4M x 32Bits x 4Banks Mobile DDR SDRAM |
|
| 6 | IS46LR32200B |
ISSI |
512K x 32Bits x 4Banks Mobile DDR SDRAM |
|
| 7 | IS46LR32200C |
ISSI |
512K x 32Bits x 4Banks Mobile DDR SDRAM |
|
| 8 | IS46LR32400F |
ISSI |
1M x 32Bits x 4Banks Mobile DDR SDRAM |
|
| 9 | IS46LR32400G |
ISSI |
1M x 32Bits x 4Banks Mobile DDR SDRAM |
|
| 10 | IS46LR32640A |
ISSI |
16M x 32Bits x 4Banks Mobile DDR SDRAM |
|
| 11 | IS46LR32640B |
ISSI |
2Gb Mobile DDR SDRAM |
|
| 12 | IS46LR32800F |
ISSI |
2M x 32Bits x 4Banks Mobile DDR SDRAM |
|