INA8583N - IK Semiconductor

INA8583N Clock Calendar

TECHNICAL DATA CMOS timer with RAM and I2C-bus control. INA8583N INA8583N is a timer with RAM and I2C-bus control. Designed for use in appliances having I2C-bus as clock/calendar/timer/alarm/events counter for turning on functions of the appliance at preset time or upon completion of an event. To be used in audio and appliances. - I2C- bus interface opera.

Features

Table1
  – PIN ASSIGNMENT OSCI OSCO A0 GND SDA SCL INT Vcc Pin 1 2 3 4 5 6 7 8 w w w t a .D OSCI OSCO A0 GND Generator input, 50Hz or occurrences Generator output Address input GND Data for I2C-bus Clock pulses for I2C-bus Open-drain interrupt output Supply voltage S a e h U 4 t e .c TA = -20° Tо 70° C m o Pinning diagram 1 2 3 4 8 7 6 5 Vcc INT SCL SDA Fig.1 w w w .D at a e h S 1 4 et U o .c m INA8583 Block diagram INA8583N INA8583N OSCI OSCO INT VCC GND A0 SCL SDA I2C-bus interface Address register Power-on reset INA8583 OSCILLATOR 32.768kHz Divider 1:256 or 100:128.