IN74HCT109A - IK Semiconductor

IN74HCT109A Dual J-K Positive-Edge-Triggered Flip-Flop

TECHNICAL DATA IN74HCT109A Dual J-K Flip-Flop with set and Reset High-Performance Silicon-Gate CMOS The IN74HCT109A is identical in pinout to the LS/ALS109. The IN74HCT109A may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. This device consists of two J-K flip-flops with individual set, reset, and clock inputs. C.

Features

No Change H L PIN 8 = GND H H L X X No Change X = Don’t care
* Both outputs will remain high as long as Set and Reset are low., but the output states are unpredictable if Set and Reset go high simultaneously. 1 www.DataSheet4U.com IN74HCT109A MAXIMUM RATINGS
* Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
* Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Tempera.