IDTCV104B - Integrated Device Technology

IDTCV104B CLOCK GENERATOR FOR DESKTOP PC PLATFORMS

KEY SPECIFICATION: • • • • CPU/SRC CLK cycle to cycle jitter < 125ps SATA CLK cycle to cycle jitter < 125ps PCI CLK cycle to cycle jitter < 250ps Static PLL frequency divide error as low as 36ppm FUNCTIONAL BLOCK DIAGRAM DataSheet4U.com PLL1 SSC EasyN Programming CPU CLK Output Buffers CPU[1:0] DataShee X1 XTAL Osc Amp IREF REF 3.1.0 X2 PLL2 SSC Ea.

Features

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• 4 PLL architecture Linear frequency programming Independent frequency programming and SSC control Band-gap circuit for differential output High power-noise rejection ratio 66MHz to 533MHz CPU frequency VCO frequency up to 1.1G Support index block read/write, single cycle index block read Programmable REF, 3V66, PCI, 48MHz I/O drive strength Programmable 3V66 and PCI Skew Available in SSOP package IDTCV104B is a 48 pin clock generation device for desktop PC platforms. This chip incorporates four PLLs to allow independent generation of CPU, AGP/ PCI, SRC, and 48MHz clock.