The IDT72V3683/72V3693/72V36103 are designed to run off a 3.3V supply for exceptionally low power consumption. These devices are monolithic, highspeed, low-power, CMOS unidirectional Synchronous (clocked) FIFO memory which supports clock frequencies up to 100 MHz and has read access times as fast as 6.5 ns. The 16,384/32,768/65,536 x 36 dual-port SRAM FIFO b.
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Memory storage capacity: IDT72V3683
– 16,384 x 36 IDT72V3693
– 32,768 x 36 IDT72V36103
– 65,536 x 36 Clock frequencies up to 100 MHz (6.5 ns access time) Clocked FIFO buffering data from Port A to Port B IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag functions) Programmable Almost-Empty and Almost-Full flags; each has five default offsets (8, 16, 64, 256 and 1,024) Serial or parallel programming of partial flags Port B bus sizing of 36 bits (long word), 18 bits (word) and 9 bits (byte)
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Big- or Little-Endian f.
No. | Partie # | Fabricant | Description | Fiche Technique |
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1 | IDT72V3680 |
Integrated Device Tech |
CMOS FIFO memories | |
2 | IDT72V3680 |
Renesas |
3.3V HIGH-DENSITY 36-BIT FIFO | |
3 | IDT72V3682 |
Integrated Device Technology |
3.3 VOLT CMOS SyncBiFIFO | |
4 | IDT72V3684 |
Integrated Device Technology |
3.3 VOLT CMOS SyncBiFIFO | |
5 | IDT72V3686 |
Integrated Device Technology |
3.3 VOLT CMOS TRIPLE BUS SyncFIFO | |
6 | IDT72V36100 |
Integrated Device Tech |
CMOS FIFO | |
7 | IDT72V36100 |
Renesas |
3.3 VOLT HIGH-DENSITY SUPERSYNC FIFO | |
8 | IDT72V36102 |
Integrated Device Technology |
3.3 VOLT CMOS SyncBiFIFO | |
9 | IDT72V36103 |
Integrated Device Technology |
3.3 VOLT CMOS SyncFIFO | |
10 | IDT72V36104 |
Integrated Device Technology |
3.3 VOLT CMOS SyncBiFIFO | |
11 | IDT72V36106 |
Integrated Device Technology |
3.3 VOLT CMOS TRIPLE BUS SyncFIFO | |
12 | IDT72V3611 |
IDT |
CMOS FIFO memories |