The IDT72V3612 is designed to run off a 3.3V supply for exceptionally lowpowerconsumption. Thisdeviceisamonolithichigh-speed,low-powerCMOS .
• Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions
• Supports clock frequencies up to 83 MHz
• Fast access times of 8ns
• Free-running CLKA and CLKB can be asynchronous or
coincident (simultaneous reading and writing of data on a single clock edge is permitted)
• Mailbox bypass Register for each FIFO
• Programmable Almost-Full and Almost-Empty Flags
• Microprocessor interface control logic
• EFA , FFA , AEA , and AFA flags synchronized by CLKA
• EFB , FFB , AEB , and AFB flags synchronized by CLKB
• Passive parity checking on each port
• Par.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | IDT72V36100 |
Integrated Device Tech |
CMOS FIFO | |
2 | IDT72V36100 |
Renesas |
3.3 VOLT HIGH-DENSITY SUPERSYNC FIFO | |
3 | IDT72V36102 |
Integrated Device Technology |
3.3 VOLT CMOS SyncBiFIFO | |
4 | IDT72V36103 |
Integrated Device Technology |
3.3 VOLT CMOS SyncFIFO | |
5 | IDT72V36104 |
Integrated Device Technology |
3.3 VOLT CMOS SyncBiFIFO | |
6 | IDT72V36106 |
Integrated Device Technology |
3.3 VOLT CMOS TRIPLE BUS SyncFIFO | |
7 | IDT72V3611 |
IDT |
CMOS FIFO memories | |
8 | IDT72V36110 |
Integrated Device Tech |
CMOS FIFO memories | |
9 | IDT72V36110 |
Renesas |
3.3 VOLT HIGH-DENSITY SUPERSYNC FIFO | |
10 | IDT72V3622 |
Integrated Device Tech |
CMOS FIFO memories | |
11 | IDT72V3623 |
Integrated Device Technology |
CMOS FIFO | |
12 | IDT72V3623 |
Renesas |
CMOS SyncFIFO |