IDT72V12081 - Integrated Device Technology

IDT72V12081 3.3 VOLT MULTIMEDIA FIFO

The IDT72V10081/72V11081/72V12081/72V13081/72V14081 devices are low-power First-In, First-Out (FIFO) memories with clocked read and write controls. These devices have a 256, 512, 1,024, 2,048 and 4,096 x 8-bit memory array, respectively. These FIFOs are applicable for a wide variety of data buffering needs such as graphics and interprocessor communication. T.

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• DESCRIPTION The IDT72V10081/72V11081/72V12081/72V13081/72V14081 devices are low-power First-In, First-Out (FIFO) memories with clocked read and write controls. These devices have a 256, 512, 1,024, 2,048 and 4,096 x 8-bit memory array, respectively. These FIFOs are applicable for a wide variety of data buffering needs such as graphics and interprocessor communication. These FIFOs have 8-bit input and output ports. The input port is controlled by a free-running clock (WCLK) and Write Enable pin (WEN). Data is written into the Multimedia FIFO on every rising clock edge w.