Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times. With an input data register, the IDT70V3319.
compliant to IEEE 1149.1
– Due to limited pin count, JTAG is not supported on the 128-pin TQFP package.
Features:
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True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access
– Commercial: 3.6ns (166MHz)/4.2ns (133MHz) (max.)
– Industrial: 4.2ns (133MHz) (max.) Selectable Pipelined or Flow-Through output mode
– Due to limited pin count PL/FT option is not supported on the 128-pin TQFP package. Device is pipelined outputs only on each port. Counter enable and repeat features Dual chip enables allow for depth expansion without ad.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | IDT70V3399 |
IDT |
SYNCHRONOUS DUAL-PORT STATIC RAM | |
2 | IDT70V3319 |
Integrated Device Technology |
SYNCHRONOUS DUAL-PORT STATIC RAM | |
3 | IDT70V3319S |
IDT |
SYNCHRONOUS DUAL-PORT STATIC RAM | |
4 | IDT70V3379S |
Integrated Device Technology |
HIGH-SPEED 3.3V 32K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM | |
5 | IDT70V3389S |
Integrated Device Technology |
HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM | |
6 | IDT70V34 |
IDT |
HIGH-SPEED 3.3V 8K x 18 DUAL-PORT STATIC RAM | |
7 | IDT70V34L |
IDT |
HIGH-SPEED 3.3V 8K x 18 DUAL-PORT STATIC RAM | |
8 | IDT70V34S |
IDT |
HIGH-SPEED 3.3V 8K x 18 DUAL-PORT STATIC RAM | |
9 | IDT70V35 |
IDT |
HIGH-SPEED 3.3V 8K x 18 DUAL-PORT STATIC RAM | |
10 | IDT70V3569S |
IDT |
HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM | |
11 | IDT70V3579S |
Integrated Device Technology |
HIGH-SPEED 3.3V 32K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM | |
12 | IDT70V3589 |
IDT |
HIGH-SPEED SYNCHRONOUS DUAL-PORT STATIC RAM |