ICS9112-26 - Integrated Circuit Systems

ICS9112-26 Low Skew Output Buffer

a The ICS9112-26 a high performance, low skew, low jitter .D It is is clock driver. designed to distribute high speed clocks in PC w systems operating at speeds from 0 to 133 MHz. w wThe ICS9112-26 comes in an eight pin 150 mil SOIC package. It has four output clocks. Block Diagram CLK0 Low Skew Output Buffer he 4 t e U . m o c ICS9112-26 Features • •.

Features

•
•
•
•
•
• Frequency range 0 - 133 MHz (3.3V) Less than 200 ps Jitter between outputs Skew controlled outputs Skew less than 250 ps between outputs Available in 8 pin 150 mil SOIC & 173 mil TSSOP packages. 3.3V ±10% operation Pin Configuration CLK1 CLK_IN CLK2 Pin Descriptions PIN NUMBER 1 2,6 3 4 5 7 8 PIN NAME w CLK0 VDD w 1 1 w .D TYPE OUT PWR PWR OUT OUT OUT IN t a CLK3 S a e h t e CLK0 VDD 1 2 3 4 ICS9112-26 GND U 4 .c m o 8 7 6 5 CLK_IN CLK3 VDD CLK2 CLK1 8 pin SOIC & TSSOP DESCRIPTION Buffered clock output Power Supply (3.3V) Ground Buffered clock output Buffered.