HYB39S64400BTL - Infineon Technologies

HYB39S64400BTL 64-MBit Synchronous DRAM

HYB 39S64400BT-7.5 Q67100-Q2781 HYB 39S64400BT-8 Q67100-Q1838 P-TSOP-54-2 (400mil) 133MHz 4B × 4M x4 SDRAM P-TSOP-54-2 (400mil) 125MHz 4B × 4M x4 SDRAM P-TSOP-54-2 (400mil) 133MHz 4B × 2M x8 SDRAM P-TSOP-54-2 (400mil) 125MHz 4B × 2M x8 SDRAM P-TSOP-54-2 (400mil) 133MHz 4B × 1M x16 SDRAM P-TSOP-54-2 (400mil) 125MHz 4B × 1M x16 SDRAM P-TSOP-54-2 (400mil) Low.

Features

uential wrap around The HYB 39S64400/800/160BT are four bank Synchronous DRAM’s organized as 4 banks × 4MBit ×4, 4 banks × 2 MBit ×8 and 4 banks × 1 Mbit ×16 respectively. These synchronous devices achieve high speed data transfer rates by employing a chip architecture that prefects multiple bits and then synchronizes the output data to a system clock. The chip is fabricated using the Infineon advanced 0.2 µm 64 MBit DRAM process technology. The device is designed to comply with all JEDEC standards set for Synchronous DRAM products, both electrically and mechanically. All of the control, addr.