Features The Fully static operation and HY62256A/HY62256A-I Tri-state outputs is a high-speed, low TTL compatible inputs power and 32,786 x 8-bits and outputs CMOS Static Random Low power consumption Access Memory -2.0V(min.) data fabricated using retention Hyundai's high Standard pin performance CMOS configuration process technology. The -28 pin 600 mil PDI.
The Fully static operation and HY62256A/HY62256A-I Tri-state outputs is a high-speed, low TTL compatible inputs power and 32,786 x 8-bits and outputs CMOS Static Random Low power consumption Access Memory -2.0V(min.) data fabricated using retention Hyundai's high Standard pin performance CMOS configuration process technology. The -28 pin 600 mil PDIP HY62256A/HY62256A-I -28 pin 330 mil SOP has a data retention mode -28 pin 8x13.4 mm that guarantees data to TSOP-1 remain valid at the (standard and reversed) minimum power supply voltage of 2.0 volt. Using the CMOS technology, supply voltages fro.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HY62256ALLJ |
Hynix Semiconductor |
32Kx8bit CMOS SRAM | |
2 | HY62256ALLR1 |
Hynix Semiconductor |
32Kx8bit CMOS SRAM | |
3 | HY62256ALLT1 |
Hynix Semiconductor |
32Kx8bit CMOS SRAM | |
4 | HY62256ALJ |
Hynix Semiconductor |
32Kx8bit CMOS SRAM | |
5 | HY62256ALJ-I |
Hynix Semiconductor |
32Kx8bit CMOS SRAM | |
6 | HY62256ALP |
Hynix Semiconductor |
32Kx8bit CMOS SRAM | |
7 | HY62256ALP |
Hynix Semiconductor |
32K x 8-Bit CMOS SRAM | |
8 | HY62256ALP |
Hyundai |
32K x 8-Bit CMOS SRAM | |
9 | HY62256ALP |
Hyundai |
32K x 8-Bit CMOS SRAM | |
10 | HY62256ALP-I |
Hynix Semiconductor |
32Kx8bit CMOS SRAM | |
11 | HY62256ALR1 |
Hynix Semiconductor |
32Kx8bit CMOS SRAM | |
12 | HY62256ALR2-I |
Hynix Semiconductor |
32Kx8bit CMOS SRAM |