HT24LC64 - Holtek Semiconductor

HT24LC64 CMOS 64K 2-WIRE SERIAL EEPROM

· Serial clock (SCL) The SCL input is used for positive edge clock data into each EEPROM device and negative edge clock data out of each device. · Serial data (SDA) stable whenever the clock line is high. Changes in data line while the clock line is high will be interpreted as a START or STOP condition. · Start condition The SDA pin is bidirectional for s.

Features

ice reliability. D.C. Characteristics Symbol VCC ICC1 ICC2 VIL VIH VOL ILI ILO ISTB1 ISTB2 CIN COUT Parameter Operating Voltage Operating Current Operating Current Input Low Voltage Input High Voltage Output Low Voltage Input Leakage Current Output Leakage Current Standby Current Standby Current Input Capacitance (See Note) Test Conditions VCC ¾ 5V 5V ¾ ¾ Conditions ¾ Read at 100kHz Write at 100kHz ¾ ¾ Min. 2.4 ¾ ¾ -1 0.7VCC ¾ ¾ ¾ ¾ ¾ ¾ ¾ Typ. ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ Ta=0°C to 70°C Max. 5.5 2 5 0.3VCC VCC+0.5 0.4 1 1 5 4 6 8 Unit V mA mA V V V mA mA mA mA pF pF 2.4V IOL=2.1mA 5V 5V 5V VIN=0.