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The HD74LVC16374A has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high agai.
• VCC = 2.0 V to 5.5 V
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All o.
HD74LVC16374A - Hitachi Semiconductor
The HD74LVC16374A has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | HD74LVC16373A |
Hitachi Semiconductor |
16-bit D-type Transparent Latches with 3-state Outputs |
|
| 2 | HD74LVC16373A |
Renesas |
16-bit D-type Transparent Latches |
|
| 3 | HD74LVC16240A |
Hitachi Semiconductor |
16-bit Buffers / Line Drivers with 3-state Outputs |
|
| 4 | HD74LVC16240A |
Renesas |
16-bit Buffers / Line Drivers |
|
| 5 | HD74LVC16241 |
Hitachi Semiconductor |
16-bit Buffers / Line Drivers with 3-state Outputs |
|
| 6 | HD74lVC16244A |
Hitachi Semiconductor |
16-bit Buffers / Line Drivers with 3-state Outputs |
|
| 7 | HD74LVC16245A |
Hitachi Semiconductor |
16-bit Bus Transceivers with 3-state Outputs |
|
| 8 | HD74LVC16245A |
Renesas |
16-bit Bus Transceivers |
|
| 9 | HD74LVC16540 |
Hitachi Semiconductor |
16-bit Buffers / Line Drivers with 3-state Outputs |
|
| 10 | HD74LVC16541 |
Hitachi Semiconductor |
16-bit Buffers / Line Drivers with 3-state Outputs |
|
| 11 | HD74LVC125A |
Hitachi Semiconductor |
Quad. Bus Buffer Gates with 3-state Outputs |
|
| 12 | HD74LVC125A |
Renesas |
Quad. Bus Buffer Gates |
|