HD74HC173 - Hitachi Semiconductor

HD74HC173 4-bit D-type Register

The four D type Flip-Flops operate synchronously from a common clock. The 3-state outputs allow the device to be used in bus organized systems. The outputs are placed in the 3-stage mode when either of the output disable pins are in the logic high level. The input disable allows the flip-flops to remain in their present states without having to disrupt the c.

Features

•
•
•
•
• High Speed Operation: tpd (Clock to Q) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs Data Enable Clear H L L L L L Clock X L G1 X X H X L L G2 X X X H L L Data D X X X X L H Output Q L Q0 Q0 Q0 L H Note: When either M or N (or both) is (are) high the output is disabled to the high-impedance state; however sequential operation of the flip-flops is not affected. HD74HC173 Pin Arrangement Output Control M.