HD74ALVCH162501 - Hitachi Semiconductor

HD74ALVCH162501 18-bit Universal Bus Transceivers with 3-state Outputs

Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A bus data is stored in th.

Features

• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±12 mA (@VCC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
• All outputs have equivalent 26 Ω series resistors, so no external resistors are required. HD74ALVCH162501 Function Table
*3 Inputs OEAB L H H H H H H LEAB X H H L L L L CLKAB X X X ↑ ↑ H L A X L H L H X X Z L H L H B0 B0
*1
*2 Output B H : High level L : Low level X : Immaterial Z : High impedance ↑ : Low to high trans.