HCS125MS - Intersil Corporation

HCS125MS Radiation Hardened Quad Buffer

The Intersil HCS125MS is a Radiation Hardened quad three-state buffer, each having its own output enable input. A high level on the enable input puts the output in a high impedance state. The HCS125MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HC.

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• 3 Micron Radiation Hardened SOS CMOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s, 20ns Pulse Latch-Up Free Under Any Conditions Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min Input Current Levels Ii ≤ 5µA at VOL, VOH
• Description The Intersil HCS125MS .