HCF40101B - STMicroelectronics

HCF40101B 9-BIT PARITY GENERATOR/CHECKER

OF ”B” SERIES CMOS DEVICES” EY (Plastic Package) F (Ceramic Frit Seal Package) M1 (Micro Package) C1 (Plastic Chip Carrier) ORDER CODES : HCC40101BF HCF40101BM1 HCF40101BEY HCF40101BC1 PIN CONNECTIONS DESCRIPTION The HCC40101B (extended temperature range) and HCF40101B (intermediate temperature range) are monolithic integrated circuits, available in 1.

Features

tate odd or even parity generation and checking. When used as a parity generator, a parity bit is supplied along with the data to generate an even or odd parity output. When used a parity checker, the received data bits and parity bits are compared for correct parity. The even or odd outputs are used to indicate an error in the received data. Word-length capability is expandable by cascading. The HCC/HCF40101B is also provided with an inhibit control. If the inhibit control is set at logical ”1”, the even and odd outputs go to a logical ”0”. June 1989 1/11 HCC/HCF40101B FUNCTIONAL DIAGRAM AB.