The MAX 9000 family of in-system-programmable, high-density, highperformance EPLDs is based on Altera’s third-generation MAX architecture. Fabricated on an advanced CMOS technology, the EEPROMbased MAX 9000 family provides 6,000 to 12,000 usable gates, pin-to-pin delays as fast as 10 ns, and counter speeds of up to 144 MHz. The -10 speed grade of the MAX 90.
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High-performance CMOS EEPROM-based programmable logic devices (PLDs) built on third-generation Multiple Array MatriX (MAX®) architecture 5.0-V in-system programmability (ISP) through built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990 High-density erasable programmable logic device (EPLD) family ranging from 6,000 to 12,000 usable gates (see Table 1) 10-ns pin-to-pin logic delays with counter frequencies of up to 144 MHz Fully compliant with the peripheral compon.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | EPM9320 |
Altera Corporation |
Max 9000(a) Programmable Logic Device Family (6k Gates) | |
2 | EPM9400 |
Altera Corporation |
Max 9000(a) Programmable Logic Device Family (6k Gates) | |
3 | EPM9480 |
Altera Corporation |
Max 9000(a) Programmable Logic Device Family (6k Gates) | |
4 | EPM9560 |
Altera Corporation |
Max 9000(a) Programmable Logic Device Family (6k Gates) | |
5 | EPM9560A |
Altera Corporation |
Max 9000(a) Programmable Logic Device Family (6k Gates) | |
6 | EPM-14 |
VERSALOGIC |
AMD LX 800 Based SBC | |
7 | EPM-4 |
VERSALOGIC |
AMD processor module | |
8 | EPM-4001 |
TE |
SpO2 Optical Sensor | |
9 | EPM-5 |
VERSALOGIC |
AMD GX Based SBC | |
10 | EPM1270 |
Altera Corporation |
(EPMxxxx) JTAG & In-System Programmability | |
11 | EPM2210 |
Altera Corporation |
(EPMxxxx) JTAG & In-System Programmability | |
12 | EPM240 |
Altera Corporation |
(EPMxxxx) JTAG & In-System Programmability |