DS3647A - National Semiconductor Corporation

DS3647A Quad Tri-state MOS Memory I/o Register

The DS3647A is a 4-bit I O buffer register intended for use in MOS memory systems This circuit employs a fall-through latch for data storage This method of latching captures the data in parallel with the output thus eliminating the delays encountered in other designs This circuit uses Schottkyclamped transistor logic for minimum propagation delay and employs.

Features

TRI-STATE outputs The ‘‘B’’ port outputs are designed for use in bus organized data transmission systems and can sink 80 mA and source b5 2 mA Data going from port ‘‘A’’ to port ‘‘B’’ and from ‘‘B’’ to port ‘‘A’’ is inverted in the DS3647A Features Y Y Y Y Y Y Y Y PNP inputs minimize loading Fall-through latch design Propagation delay of only 15 ns TRI-STATE outputs EXPANSION control Bi-directional data flow TTL compatible Transmission line driver output Logic and Connection Diagrams Dual-In-Line Package TL F 8354
  – 2 Top View Order Number DS3647AD or DS3647AN See NS Package Number D16C o.