DS21372 - Dallas Semiconducotr

DS21372 3.3V Bit Error Rate Tester BERT

The DS21372 Bit Error Rate Tester (BERT) is a software programmable test pattern generator, receiver, and analyzer capable of meeting the most stringent error performance requirements of digital transmission facilities. Two categories of test pattern generation (Pseudo-random and Repetitive) conform to CCITT/ITU O.151, O.152, O.153, and O.161 standards. The .

Features

Generates/detects digital bit patterns for analyzing, evaluating and troubleshooting digital communications systems Operates at speeds from DC to 20 MHz Programmable polynomial length and feedback taps for generation of any other pseudorandom pattern up to 32 bits in length including: 26-1, 29-1, 211-1, 215-1, 220-1, 223-1, and 232-1 Programmable user-defined pattern and length for generation of any repetitive pattern up to 32 bits in length Large 32-bit error count and bit count registers Software programmable bit error insertion Fully independent transmit and receive sections 8-bit parallel .