DP80C51 - Digital Core Design

DP80C51 Pipelined High Performance 8-bit Microcontroller

I/O Port 3.5, multifunctional Timer 1 external clock line I/O Port 3.6 External Data Memory write I/O Port 3.7 External Data Memory read Enable all external program memory Data bus from int. RAM prog. memory Data bus from int. ROM prog. memory Data bus from internal data memory Data bus from user SFR’s DoCD™ TAP data input DoCD™ TAP clock input DoCD™ TAP mod.

Features

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● 100% pin compatible with industry standard 8051 100% software compatible with industry standard 8051 Pipelined RISC architecture enables to execute instructions up to 10 times faster compared to standard 8051 24 times faster multiplication 12 times faster addition Up to 256 bytes of internal (on-chip) Data Memory Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory Up to 64K bytes of external (off-chip) Data Memory User programmable Program Memory Wait States solution for wide range of memories speed User programmable External Data Memory Wait States solution for w.