Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR-invert gates. Separate strobe inputs are provided for each of the two four-line sections. Features s Permits multiplexing from N lines to 1 line s Performs parallel-to-serial conversion s Strobe (enabl.
s Permits multiplexing from N lines to 1 line s Performs parallel-to-serial conversion s Strobe (enable) line provided for cascading (N lines to n lines) s High fan-out, low-impedance, totem-pole outputs s Typical average propagation delay times From data 6 ns From strobe 9.5 ns From select 12 ns s Typical power dissipation 225 mW Ordering Code: Order Number Package Number Package Description DM74S153N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram Function Table Select Inputs Data Inputs Strobe B A C0 C1 C2 C3 G XX X X X X H LL L .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | DM74S151 |
Fairchild Semiconductor |
1-of-8 Data Selector/Multiplexer | |
2 | DM74S157 |
Fairchild Semiconductor |
Quad 1 of 2 Line Data Selector/Multiplexer | |
3 | DM74S157 |
National Semiconductor |
QUAD 1 OF 2 LINE DATA SELECTORS/MULTIPLEXERS | |
4 | DM74S158 |
Fairchild Semiconductor |
Quad 1 of 2 Line Data Selector/Multiplexer | |
5 | DM74S158 |
National Semiconductor |
QUAD 1 OF 2 LINE DATA SELECTORS/MULTIPLEXERS | |
6 | DM74S10 |
Fairchild Semiconductor |
Triple 3-Input NAND Gate | |
7 | DM74S11 |
Fairchild Semiconductor |
Triple 3-Input AND Gate | |
8 | DM74S112 |
Fairchild Semiconductor |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop | |
9 | DM74S132 |
National Semiconductor |
Quad 2-Input Schmitt Trigger NAND Gate | |
10 | DM74S133 |
Fairchild Semiconductor |
13-Input NAND Gate | |
11 | DM74S138 |
Fairchild Semiconductor |
Decoder/Demultiplexer | |
12 | DM74S139 |
Fairchild Semiconductor |
Decoder/Demultiplexer |