DM74LS126A - Fairchild Semiconductor

DM74LS126A Quad 3-STATE Buffer

This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output tra.

Features

ge (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y=A Inputs A L H X C H H L Output Y L H Hi-Z H = HIGH Logic Level L = LOW Logic Level X = Either LOW or HIGH Logic Level Hi-Z = 3-STATE (Outputs are disabled) © 2000 Fairchild Semiconductor Corporation DS006388 www.fairchildsemi.com DM74LS126A Absolute Maximum Ratings(Note 1) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 7V 0°C to +70°C −65°C to +150°C Note 1: The.