These positive-edge triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic All have a direct clear input and the quad (175) version features complementary outputs from each flip-flop Information at the D inputs meeting the setup and hold time requirements is transferred to the Q outputs on the positivegoing edge of the clock pulse Clo.
complementary outputs from each flip-flop Information at the D inputs meeting the setup and hold time requirements is transferred to the Q outputs on the positivegoing edge of the clock pulse Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse When the clock input is at either the high or low level the D input signal has no effect at the output Features Y 174 contains six flip-flops with single-rail outputs Y 175 contains four flip-flops with double-rail outputs Y Buffered clock and direct clear inputs Y Individu.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | DM7417 |
Fairchild Semiconductor |
Hex Buffers | |
2 | DM7417 |
National Semiconductor |
High Voltage Open-Collector Outputs | |
3 | DM74170 |
National Semiconductor |
4 x 4 Register File | |
4 | DM74173 |
National Semiconductor |
Quad D Registers | |
5 | DM74174 |
Fairchild Semiconductor |
Hex/Quad D-Type Flip-Flop with Clear | |
6 | DM74174 |
National Semiconductor |
Hex/Quad D Flip-Flops | |
7 | DM7410 |
National Semiconductor |
Triple 3-Input NAND Gates | |
8 | DM74121 |
Fairchild Semiconductor |
Monostable multivibrator | |
9 | DM74121 |
National Semiconductor |
Monostable multivibrator | |
10 | DM74121N |
Fairchild Semiconductor |
Monostable multivibrator | |
11 | DM74122 |
National Semiconductor |
Retriggerable Resettable Multivibrator | |
12 | DM74123 |
Fairchild Semiconductor |
Dual retriggerable monostable multivibrator |