CY7C1021BV33 - Cypress Semiconductor

CY7C1021BV33 64K x 16 Static RAM

of read and write modes. The input/output pins (I/O1 through I/O16) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1021BV is available in 400-mil-wide SOJ, standard 44-pin TSOP Type II, and.

Features

• 3.3V operation (3.0V
  –3.6V)
• High speed — tAA = 10/12/15 ns
• CMOS for optimum speed/power
• Low Active Power (L version) — 576 mW (max.)
• Low CMOS Standby Power (L version) — 1.80 mW (max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II and 400-mil SOJ
• Available in a 48-Ball Mini BGA package Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pi.