CMP82C55AZ - Intersil Corporation

CMP82C55AZ CMOS Programmable Peripheral Interface

SYMBOL VCC GND D0-D7 RESET CS RD WR A0-A1 I/O I I I I I TYPE DESCRIPTION VCC: The +5V power supply pin. A 0.1µF capacitor between VCC and GND is recommended for decoupling. GROUND DATA BUS: The Data Bus lines are bidirectional three-state pins connected to the system data bus. RESET: A high on this input clears the control register and all ports (A, B, C) ar.

Features

as the X82C55 with the exception of no bus hold devices on the port pins. It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins which may be individually programmed in two groups of 12 and used in three major modes of operation. The high performance and industry standard configuration of the 82C55A make it compatible with the 80C86, 80C88 and other microprocessors. Static CMOS circuit design insures low operating power. The Intersil advanced SAJI process results in performance equal to or greater than existing functionally .