CEC1302 - Microchip

CEC1302 Low Power Crypto Embedded Controller

The CEC1302 incorporates a high-performance 32-bit ARM® Cortex®-M4 embedded microcontroller with 128 Kilobytes of SRAM and 32 Kilobytes of Boot ROM. It communicates with the system host using the I2C bus. The CEC1302 has two SPI memory interfaces that allow the EC to read its code from ex.

Features

• ARM® Cortex®-M4 Processor Core - 32-Bit ARM v7-M Instruction Set Architecture - Hardware Floating Point Unit (FPU) - Single 4GByte Addressing Space (Von Neumann Model) - Little-Endian Byte Ordering - Bit-Banding Feature Included - NVIC Nested Vectored Interrupt Controller - Up to 240 Individually-Vectored Interrupt Sources Supported - 8 Levels of Priority, Individually Assignable By Vector - Chip-Level Interrupt Aggregator supported, to expand number of interrupt sources or reduce number of vectors - System Tick Timer - Complete ARM-Standard Debug Support - JTAG-Based DAP Port, Comprised of .