CD4007CN - Fairchild Semiconductor

CD4007CN Dual Complementary Pair Plus Inverter

The CD4007C consists of three complementary pairs of Nand P-channel enhancement mode MOS transistors suitable for series/shunt applications. All inputs are protected from static discharge by diode clamps to VDD and VSS. For proper operation the voltages at all pins must be constrained to be between VSS − 0.3V and VDD + 0.3V at all times. Features s Wide sup.

Features

s Wide supply voltage range: 3.0V to 15V s High noise immunity: 0.45 VCC (typ.) Ordering Code: Order Number Package Number Package Description CD4007CM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow CD4007CN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS
  –001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP and SOIC Note: All P-channel substrates are connected to VDD and all N-channel substrates are connected to VSS. Top Vie.