The AZ10/100E142 is a 9-bit shift register, designed with byte-parity applications in mind. The E142 performs serial/parallel in and serial/parallel out, shifting in one direction. The nine inputs D0-D8 accept parallel input data, while S-IN accepts serial input data. The Qn outputs do not need to be terminated for the shift operation to function. To minimiz.
•
•
•
•
•
•
• 700 MHz Minimum Shift Frequency 9-Bit for Byte-Parity Application Asynchronous Master Reset Dual Clocks Operating Range of 4.2V to 5.46V 75kΩ Internal Input Pulldown Resistors Direct Replacement for ON Semi MC10E142 & MC100E142 PACKAGE
PLCC 28 PLCC 28
1 2
PACKAGE AVAILABILITY PART NUMBER
AZ10E142FN AZ100E142FN
MARKING
AZM10E142
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | AZ10E111 |
Arizona |
1:9 Differential Clock Driver | |
2 | AZ10E116 |
Arizona Microtek |
ECL/PECL Quint Differential Line Receiver | |
3 | AZ10E131 |
Arizona Microtek |
ECL/PECL 4-bit D Flip-Flop | |
4 | AZ10EL01 |
Arizona Microtek |
ECL/PECL 4-Input OR/NOR | |
5 | AZ10EL07 |
Arizona |
ECL/PECL 2-Input XOR/XNOR | |
6 | AZ10EL11 |
Arizona |
ECL/PECL 1:2 Differential Fanout Buffer | |
7 | AZ10EL16 |
Arizona Microtek |
ECL/PECL Differential Receiver | |
8 | AZ10EL16VO |
AZM |
ECL/PECL Oscillator Gain Stage and Buffer | |
9 | AZ10EL31 |
Arizona |
ECL/PECL D Flip-Flop | |
10 | AZ10EL32 |
Arizona |
ECL/PECL / 2 Divider | |
11 | AZ10EL58 |
Arizona Microtek |
ECL/PECL 2:1 Multiplexer | |
12 | AZ10EL89 |
Arizona Microtek |
ECL/PECL Coaxial Cable Driver |