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AS4C128M16D3A-12BIN - Alliance Semiconductor

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AS4C128M16D3A-12BIN 2Gb Double-Data-Rate-3 DRAM

AS4C128M16D3A-12BIN Revision History 2Gb AS4C128M16D3A-12BIN - 96 ball FBGA PACKAGE Revision Details Rev 1.0 Preliminary datasheet Date May. 2016 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential -183- .

Features


• JEDEC Standard Compliant
• Power supplies: VDD & VDDQ = +1.5V ± 0.075V
• Operating temperature: -40~95°C (TC)
• Supports JEDEC clock jitter specification
• Fully synchronous operation
• Fast clock rate: 800MHz
• Differential Clock, CK & CK#
• Bidirectional differential data strobe - DQS & DQS#
• 8 internal banks for concurrent operation
• 8n-bit prefetch architecture
• Pipelined internal architecture
• Precharge & active power down
• Programmable Mode & Extended Mode registers
• Additive Latency (AL): 0, CL-1,.

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