AN2540 - Freescale Semiconductor

AN2540 Synchronizing Instructions

www.DataSheet4U.com Freescale Semiconductor, Inc. Application Note AN2540/D Rev. 0.1, 6/2003 Synchronizing Instructions for PowerPC™ Instruction Set Architecture Freescale Semiconductor, Inc... The architecture for the PowerPC™ Instruction Set provides two types of synchronizing instructions: context-synchronizing and execution-synchronizing instructions.

Features

in processor registers, as shown in Table 1. The context-synchronizing instructions ensure that the following conditions occur:
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• Instruction dispatching is halted. The sc instruction also ensures that no higher priority exception exists. All previously issued instructions have completed, at least to a point where they are no longer able to cause an exception. However, memory accesses that these instructions cause need not have completed with respect to other processors and mechanisms. The sync instruction can be used to ensure that memory accesses are complete. Instructions that were previo.