AHA3580 - AHA

AHA3580 80 MBYTES/SEC ALDC DATA COMPRESSION COPROCESSOR IC

Major blocks in this device are the Microprocessor Interface, Port A Interface, Port B Interface, and the Compression/Decompression Engine. The Microprocessor Interface provides status and control information by register access. Port A and Port B Interfaces are DMA ports configurable for polarity, handshaking modes, and other options. The operating mode esta.

Features

PERFORMANCE:
• 80 MBytes/sec data compression, decompression or pass-through rate with a single 80 MHz clock
• 2:1 average compression ratio
• A four byte Record Length register allows record lengths up to 4 gigabytes
• Four byte Record Count register allows multiple record transfers
• Error checking in decompression mode reportable via an interrupt FLEXIBILITY:
• Polled or interrupt driven I/O
• Port A/B DMA interfaces include FAS466, FAS440 and AIC-43C97C
• Programmable polarity for DMA control signals
• DMA FIFO access via microprocessor port at Port A Interface SYSTEM INTERFACE: VDD GND.