ADSP-2186L - Analog Devices

ADSP-2186L DSP Microcomputer

DSP Microcomputer ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L PERFORMANCE FEATURES Up to 19 ns instruction cycle time, 52 MIPS sustained performance Single-cycle instruction execution Single-cycle context switch 3-bus architecture allows dual operand fetches in every instruction cycle Multifunction instructions Power-down mode featuring low CMOS standby pow.

Features

Up to 19 ns instruction cycle time, 52 MIPS sustained performance Single-cycle instruction execution Single-cycle context switch 3-bus architecture allows dual operand fetches in every instruction cycle Multifunction instructions Power-down mode featuring low CMOS standby power dissi- pation with 400 CLKIN cycle recovery from power-down condition Low power dissipation in idle mode INTEGRATION FEATURES ADSP-2100 family code compatible (easy to use algebraic syntax), with instruction set extensions Up to 160K bytes of on-chip RAM, configured Up to 32K words program memory RAM Up to 32K words dat.