ADSP-21467 - Analog Devices

ADSP-21467 SHARC Processor

.... 3 Family Core Architecture .......... 4 Family Peripheral Architecture .. 7 System Design ....... 10 Development Tools 11 Additional Information ...............

Features

AL MEMORY BLOCK 1 RAM/ROM BLOCK 2 RAM BLOCK 3 RAM S CORE BUS CROSS BAR DMD 64-BIT PMD 64-BIT EPD BUS 64-BIT B0D 64-BIT B1D 64-BIT B2D 64-BIT B3D 64-BIT INTERNAL MEMORY INTERFACE IOD0 32-BIT PERIPHERAL BUS 32-BIT IOD0 BUS S/PDIF PCG TX/RX A-D ASRC PDAP/ SPORT 3-0 IDP 7-0 7-0 FFT DTCP/ FIR MTM IIR SPEP BUS LINK CORE PWM MLB PORT FLAGS 3-0 1-0 IOD1 32-BIT EP AMI DDR2 CTL DPI ROUTING/PINS DPI PERIPHERALS DAI ROUTING/PINS DAI PERIPHERALS Figure 1. Functional Block Diagram EXTERNAL PORT PIN MUX PERIPHERALS EXTERNAL PORT SHARC and the SHARC logo are registered trademarks of Anal.